1. Field
The following description relates to a signal level detector used in an electronic circuit, and more particularly, to a peak detector and peak detection method for quickly detecting a peak value of a signal.
Also, the following description discloses a method, associated with a photoelectric amplifier, for processing a signal with low distortion by quickly and stably detecting a signal intensity of burst data and actively controlling a gain of the signal.
2. Description of the Related Art
Signal amplitude and strength detection is a technology that is essential for detecting or recovering data, without errors, in response to a wide range of changes in strength of input signals. Hence, signal detection technologies have been widely applied to the systems that receive wide-dynamic-area signals, for example, wired/wireless communication systems, measurement equipment, bio-health care and medical devices, disk drives, and so on.
Generally, a detector, as shown in FIG. 1A, is used to obtain a peak value of a signal. Referring to FIG. 1A, in a diode D 10, forward current flows from a Vs node to a Vpeak node, and reverse current flowing from the Vpeak node to the Vs node is cut off. If a voltage of the Vs node is greater than the Vpeak node, current ideally flows through the diode 10 and the current runs through a capacitor C 11, whereby the capacitor C 11 is charged. Ideally, a voltage of the Vpeak node reaches the voltage of the Vs node. However, when the voltage of the Vpeak node increases beyond the voltage of the Vs node, the current flowing through the diode 10 is cut off, so that the Vpeak node and the Vs node are electrically separated from each other. At this time, the Vpeak node remains at the voltage reached just before the current flow through the diode D was cut off. Accordingly, the voltage of the Vpeak node appears to track the peak value of the Vs node signal. Additionally, if a resistor R 12 with a specific value is connected in parallel with the capacitor C 11 and induces discharge of the capacitor C 11, it may be utilized in tracking the envelope of the signal.
FIG. 1B is a circuit diagram illustrating an example of a peak detector in a high-frequency integrated circuit.
Referring to FIG. 1B, the peak detector is applied to the integrated circuit, and includes an amplifier consisting of MOSFET1 M1, MOSFET2 M2, MOSFET 3, M3, MOSFET 4 M4, and a current source. A signal is input to a positive input node In of the amplifier 20 and an output of the amplifier 20 is fed back to a negative input node through a source follower, whereby an output node of the amplifier 20 copies the input signal intact. In this feedback circuit, a detector as described above is inserted between the output node of the amplifier and the source follower, whereby the input signal (at a gate of M1) is less affected by the load (parasitic capacitance). The higher the frequency of a signal, the more the signal is affected by the load. Thus, the detector uses the amplifier to reduce a load value, rather than using a diode with a high parasitic capacitance, and still provides the same operating characteristics as the detector with a diode.
The aforementioned peak detectors are advantageous in terms of stability, but have limitations in application to technologies (e.g., NG-PON2) that relate to prompt detection of signal peak values with a faster response time.
A diode used for signal detection appears as a capacitor component to the high-frequency signal, and hence forward signal detection and charge/discharge processes are performed simultaneously. Hence, a correct peak value of the input signal cannot be detected; rather only an average of the input signal is detected, and it even takes a substantial amount of time to obtain the average of the signal.
In optical communication applications, for example, high-speed clocks 0 and 1 are repeated in a preamble during which the signal intensity is detected and a maximum value of the detected signal is only half of the original intensity of an input signal. This is because the values of “0” and “1” are averaged due to the charge/discharge process by the aforesaid parasitic capacitor component. Consequently, the detected value is smaller than the original peak value of the signal, resulting in degradation of resolution.
Also, the integrated diode occupies a large area, and high-frequency diode processing, such as Schottky barrier diode, has to be supported in order to realize high-speed operation.